Technical Leader for Signal Integrity and Power Integrity

  • Location:
    San Jose, California, US
  • Area of Interest
    Engineer - Software
  • Job Type
  • Technology Interest
    Cloud and Data Center
  • Job Id
What You'll Do 
The hardware technical leader will lead the PCB board SI/PI design to ensure product to meet the SI/PI performance target.  He or she need to provide SI analysis on ASIC high speed signals, and provide the detailed design guidance including bump, package, and PCB level to the design team. Also he or she need to provide PI analysis and design guidance on the power delivery network, power filter, and PCB decoupling system design. 

Who You'll Work With

Who You Are
You are an engineer with deep knowledge in transmission line theory, package design, Serdes, timing analysis, power delivery network, and system power budget. 

Minimum Qualifications
Experience with simulation tools from Cadence (including Sigrity), Ansys, ADS and Synopsys. 
Solid experiences on high-speed design, such as PCIE, XFI, KR and SFP+ /QSFP, DDR2/3, etc. 
Experience with key lab equipment such as VNA, TDR and real-time/sampling scopes, spectrum analyzer and BERT.
MSEE is required.

Why Cisco
We connect everything: people, processes, data, and things. We innovate everywhere, taking bold risks to shape the technologies that give us smart cities, connected cars, and handheld hospitals. And we do it in style with unique personalities who aren't afraid to change the way the world works, lives, plays and learns. 

We are thought leaders, tech geeks, pop culture aficionados, and we even have a few purple haired rock stars. We celebrate the creativity and diversity that fuels our innovation. We are dreamers and we are doers. 

We Are Cisco.